sharadsinha

Software Tools

On this page, you will find some software tools that I have developed or contributed to their development. The keywords will tell you the primary domains in which these tools may be used.

1.  Hetero-Sim : It is a system level simulator based on Multi2Sim and Verilator to simulated architectures like “chip multiprocessors combined with FPGA”.

2. SynDFG: Synthetic Dataflow Graphs for High Level Synthesis

Keywords: Electronic Design Automation, High Level Synthesis, Reconfigurable Computing, FPGAs

The version Create_DFG_RandomIndegree.zip allows to create synthetic dataflow graphs with random in degree assigned to nodes. SynDFG_RandomIndegree.zip

The version Create_DFG_Biased.zip allows to create biased synthetic dataflow graphs with random in degree assigned to nodes. Biased DFGs are those which have a large number of nodes of a particular operation, for example, multiplication.SynDFG_Biased.zip

You will need to strip the filename of .pdf extension, then change -zip to .zip and then unzip and use. (Had to do this because WordPress.com does not allow uploading zip files)The source code has been tested on NetBeans IDE 7.2 under Windows 7 platform as well as on Linux (Ubuntu).

Some other work:

  • Big Addition

Keyword: Adding two big numbers

A reference implementation in C to add two big positive integers (up to 32767 digits each) can be found at the  github repository maintained by me here. You can use it as a reference to extend the concept to other types of numbers. It is probably not the most efficient or the most useful implementation but it serves to explain the method of doing it using the old school method of adding two numbers at a time with a carry in and a carry out.

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